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Articles about 'Patterned Wafer Geometry'

Current Issue

01 July, 2017

ADVANCED PATTERNING CONTROL

Patterning Trends for Advanced IC Manufacturing

With the move to sub-10nm design nodes, the utilization of multi-patterning techniques has intensified, with triple patterning (LELELE), self-aligned quadruple patterning (SAQP), and other complex patterning technologies being utilized to achieve smaller design nodes. IC manufacturers face many technical challenges when implementing advanced multi-patterning, including: the proliferation of process and design systematic defects; extremely tight patterning specifications; and, the erosion of process margins. In this environment, it has become necessary for IC manufacturers to: (1) utilize comprehensive strategies to find and control process and patterning variations at the source.

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