Introducing the Surfscan SP3 450
The Surfscan® SP3 450 is the first of KLA’s process control systems capable of handling and inspecting 450mm wafers. As a new configuration of the market-leading Surfscan SP3 platform, these fully-automated unpatterned wafer inspection systems feature unique deep ultra-violet (DUV) sensitivity and unique high-resolution SURFmonitorTM surface quality characterization to support sub-20nm node requirements. The Surfscan SP3 450 enables manufacturing process control for 450mm polished silicon and epitaxial silicon substrates and also delivers critical capability for manufacturers of 450mm process equipment, such as wet clean tools, CMP pads, slurries and polishers, film deposition tools and annealing systems.
13th Annual Lithography Users’ Forum
Lithography Challenges for (Sub 20nm) Semiconductor Technology Nodes
This LUF keynote presentation explores various technologies for scaling IC devices to follow Moore’s law. Several advanced patterning and layout optimization techniques for continued geometrical scaling in 193i lithography are discussed, including self aligned double patterning (SADP), directed self assembly and the move toward local interconnect layouts in advanced logic and SRAM devices. In addition, a comprehensive overview on the status of EUV lithography is presented, including an update on EUV resists, line width roughness and EUV masks. EUV lithography benefits are also examined, including its intrinsically higher resolution for printing patterns such as holes, trenches and high resolution cuts.
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Litho Defect Inspection
Accelerating Litho Technology Development for Advanced Design Node Flash Memory FEOL by Next-Generation Wafer Inspection and SEM Review Platforms
The use of a next-generation broadband optical inspector to detect yield-critical defects on FEOL ADI layers is investigated.
Application of Stochastic Modeling to Resist Optimization Problems
A stochastic resist model, calibrated to experimental data, is used to study the refinement of chemically-amplified resists for EUV lithography.
Apply Multiple Target for Advanced Gate ADI Critical Dimension Measurement by Scatterometry Technology
The metrology challenges and proposed solutions for implementing a production-worthy methodology for accurately monitoring focus and exposure at gate ADI are presented.
- Reticle Intensity Based Critical Dimension Uniformity to Improve Efficiency for DOMA Correction in a Foundry
- Recess Gate Process Control by Using 3D SCD in 3xm Vertical DRAM
- Multi-Level Overlay Techniques for Improving DPL Overlay Control
- Overlay Accuracy Fundamentals
- Overlay Quality Metric
- Overlay Control Methodology Comparison: Field-by-Field and High-Order Methods
- Weighted Least Squares Regression for Advanced Overlay Control
- Data Feed-Forward for Improved Optical CD and Film Metrology
- Photoresist Qualification using Scatterometry CD
- REBL: Design Progress Toward 16 nm Half-Pitch Maskless Projection Electron Beam Lithography
First published in the Proceedings of SPIE Advanced Lithography Conference, Feb, 2012, San Jose, California, USA.